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121
Drivers/GD32F1x0_standard_peripheral/Source/gd32f1x0_wwdgt.c
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121
Drivers/GD32F1x0_standard_peripheral/Source/gd32f1x0_wwdgt.c
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/*!
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\file gd32f1x0_wwdgt.c
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\brief WWDGT driver
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*/
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/*
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Copyright (C) 2017 GigaDevice
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2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
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2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
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2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
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2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
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*/
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#include "gd32f1x0_wwdgt.h"
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#include "gd32f1x0_rcu.h"
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/*!
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\brief reset the window watchdog timer configuration
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\param[in] none
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\param[out] none
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\retval none
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*/
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void wwdgt_deinit(void)
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{
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rcu_periph_reset_enable(RCU_WWDGTRST);
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rcu_periph_reset_disable(RCU_WWDGTRST);
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}
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/*!
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\brief configure the window watchdog timer counter value
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\param[in] counter_value: 0x00 - 0x7F
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\param[out] none
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\retval none
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*/
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void wwdgt_counter_update(uint16_t counter_value)
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{
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uint32_t reg = 0U;
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reg = WWDGT_CTL & (~WWDGT_CTL_CNT);
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reg |= (uint32_t)(CTL_CNT((uint32_t)counter_value));
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WWDGT_CTL = (uint32_t)reg;
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}
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/*!
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\brief start the window watchdog timer counter
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\param[in] none
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\param[out] none
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\retval none
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*/
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void wwdgt_enable(void)
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{
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WWDGT_CTL |= WWDGT_CTL_WDGTEN;
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}
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/*!
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\brief configure counter value, window value, and prescaler divider value
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\param[in] counter: 0x00 - 0x7F
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\param[in] window: 0x00 - 0x7F
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\param[in] prescaler: wwdgt prescaler value
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\arg WWDGT_CFG_PSC_DIV1: the time base of window watchdog counter = (PCLK1/4096)/1
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\arg WWDGT_CFG_PSC_DIV2: the time base of window watchdog counter = (PCLK1/4096)/2
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\arg WWDGT_CFG_PSC_DIV4: the time base of window watchdog counter = (PCLK1/4096)/4
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\arg WWDGT_CFG_PSC_DIV8: the time base of window watchdog counter = (PCLK1/4096)/8
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\param[out] none
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\retval none
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*/
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void wwdgt_config(uint16_t counter, uint16_t window, uint32_t prescaler)
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{
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uint32_t reg_cfg = 0U, reg_ctl = 0U;
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/* clear WIN and PSC bits, clear CNT bit */
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reg_cfg = WWDGT_CFG &(~(WWDGT_CFG_WIN | WWDGT_CFG_PSC));
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reg_ctl = WWDGT_CTL &(~(uint32_t)WWDGT_CTL_CNT);
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/* configure WIN and PSC bits, configure CNT bit */
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reg_cfg |= (uint32_t)(CFG_WIN(window));
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reg_cfg |= (uint32_t)(prescaler);
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reg_ctl |= (uint32_t)(CTL_CNT(counter));
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WWDGT_CFG = (uint32_t)reg_cfg;
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WWDGT_CTL = (uint32_t)reg_ctl;
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}
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/*!
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\brief enable early wakeup interrupt of WWDGT
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\param[in] none
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\param[out] none
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\retval none
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*/
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void wwdgt_interrupt_enable(void)
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{
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WWDGT_CFG |= WWDGT_CFG_EWIE;
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}
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/*!
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\brief check early wakeup interrupt state of WWDGT
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\param[in] none
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus wwdgt_flag_get(void)
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{
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if(WWDGT_STAT & WWDGT_STAT_EWIF){
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return SET;
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}
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return RESET;
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}
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/*!
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\brief clear early wakeup interrupt state of WWDGT
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\param[in] none
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\param[out] none
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\retval none
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*/
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void wwdgt_flag_clear(void)
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{
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WWDGT_STAT &= (uint32_t)(~(uint32_t)WWDGT_STAT_EWIF);
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}
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