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docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CMP/Interrupt/gd32f1x0_it.c

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+/*!
+    \file  gd32f1x0_it.c
+    \brief interrupt service routines
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+#include "gd32f1x0_it.h"
+#include "gd32f1x0_eval.h"
+
+/*!
+    \brief      this function handles NMI exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void NMI_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles HardFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void HardFault_Handler(void)
+{
+    /* if Hard Fault exception occurs, go to infinite loop */
+    while (1);
+}
+
+/*!
+    \brief      this function handles MemManage exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void MemManage_Handler(void)
+{
+    /* if Memory Manage exception occurs, go to infinite loop */
+    while (1);
+}
+
+/*!
+    \brief      this function handles BusFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void BusFault_Handler(void)
+{
+    /* if Bus Fault exception occurs, go to infinite loop */
+    while (1);
+}
+
+/*!
+    \brief      this function handles UsageFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void UsageFault_Handler(void)
+{
+    /* if Usage Fault exception occurs, go to infinite loop */
+    while (1);
+}
+
+/*!
+    \brief      this function handles SVC exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void SVC_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles DebugMon exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void DebugMon_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles PendSV exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void PendSV_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles SysTick exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void SysTick_Handler(void)
+{
+}
+/*!
+    \brief      this function handles External lines 21 and 22 interrupt exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void ADC_CMP_IRQHandler(void)
+{
+    if(RESET != exti_interrupt_flag_get(EXTI_21)){
+        gd_eval_led_on(LED2);
+        exti_interrupt_flag_clear(EXTI_21);
+    }
+}
+

docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CMP/Interrupt/gd32f1x0_it.h

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+/*!
+    \file  gd32f1x0_it.h
+    \brief the header file of the ISR
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+#ifndef GD32F1X0_IT_H
+#define GD32F1X0_IT_H
+
+#include "gd32f1x0.h"
+
+/* function declarations */
+/* NMI handle function */
+void NMI_Handler(void);
+/* HardFault handle function */
+void HardFault_Handler(void);
+/* MemManage handle function */
+void MemManage_Handler(void);
+/* BusFault handle function */
+void BusFault_Handler(void);
+/* UsageFault handle function */
+void UsageFault_Handler(void);
+/* SVC handle function */
+void SVC_Handler(void);
+/* DebugMon handle function */
+void DebugMon_Handler(void);
+/* PendSV handle function */
+void PendSV_Handler(void);
+/* SysTick handle function */
+void SysTick_Handler(void);
+/* ADC CMP handle function */
+void ADC_CMP_IRQHandler(void);
+
+#endif /* GD32F1X0_IT_H */
+
+

docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CMP/Interrupt/gd32f1x0_libopt.h

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+/*!
+    \file  gd32f1x0_libopt.h
+    \brief library optional for gd32f1x0
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+#ifndef GD32F1X0_LIBOPT_H
+#define GD32F1X0_LIBOPT_H
+
+#include "gd32f1x0_adc.h"
+#include "gd32f1x0_cec.h"
+#include "gd32f1x0_crc.h"
+#include "gd32f1x0_cmp.h"
+#include "gd32f1x0_dac.h"
+#include "gd32f1x0_dbg.h"
+#include "gd32f1x0_dma.h"
+#include "gd32f1x0_exti.h"
+#include "gd32f1x0_fmc.h"
+#include "gd32f1x0_gpio.h"
+#include "gd32f1x0_syscfg.h"
+#include "gd32f1x0_i2c.h"
+#include "gd32f1x0_fwdgt.h"
+#include "gd32f1x0_pmu.h"
+#include "gd32f1x0_rcu.h"
+#include "gd32f1x0_rtc.h"
+#include "gd32f1x0_spi.h"
+#include "gd32f1x0_timer.h"
+#include "gd32f1x0_usart.h"
+#include "gd32f1x0_wwdgt.h"
+#include "gd32f1x0_misc.h"
+#include "gd32f1x0_tsi.h"
+#ifdef GD32F170_190
+#include "gd32f1x0_slcd.h"
+#include "gd32f1x0_opa.h"
+#include "gd32f1x0_ivref.h"
+#include "gd32f1x0_can.h"
+#endif /* GD32F170_190 */
+
+#endif /* GD32F1X0_LIBOPT_H */

docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CMP/Interrupt/main.c

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+/*!
+    \file  main.c
+    \brief comparator trigger interrupt using an external interrupt line
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+#include "gd32f1x0.h"
+#include <stdio.h>
+#include "gd32f1x0_eval.h"
+
+void led_config(void);
+
+/*!
+    \brief      main function
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+int main(void)
+{
+    /* configure leds */
+    led_config();
+    
+    /* enable GPIOA clock */
+    rcu_periph_clock_enable(RCU_GPIOA);
+    
+    /* configure PA1 as comparator input */
+    gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ,GPIO_PIN_1);
+    gpio_mode_set(GPIOA, GPIO_MODE_ANALOG, GPIO_PUPD_PULLUP, GPIO_PIN_1);
+    
+    /* enable comparator clock */
+    rcu_periph_clock_enable(RCU_CFGCMP);
+    
+    /* configure CMP0 */
+    cmp_mode_init(CMP0, CMP_VERYLOWSPEED, CMP_1_4VREFINT, CMP_HYSTERESIS_NO);
+    cmp_output_init(CMP0, CMP_OUTPUT_NONE, CMP_OUTPUT_POLARITY_NOINVERTED);
+    
+    /* initialize exti line21 */
+    exti_init(EXTI_21, EXTI_INTERRUPT, EXTI_TRIG_RISING);
+    
+    /* configure ADC_CMP NVIC */
+    nvic_irq_enable(ADC_CMP_IRQn, 0, 0);
+    
+    /* enable CMP0 */
+    cmp_enable(CMP0);
+    
+    while(1);
+}
+
+/*!
+    \brief      configure the leds
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void led_config(void)
+{
+    gd_eval_led_init(LED1);
+    gd_eval_led_init(LED2);
+    gd_eval_led_init(LED3);
+    gd_eval_led_init(LED4);
+}

docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CMP/Interrupt/readme.txt

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+/*!
+    \file  readme.txt
+    \brief description of the comparator interrupt demo
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+  This demo is based on the GD32150R-EVAL/GD32190R-EVAL board, it shows how to 
+configure the comparator trigger interrupt using an external interrupt line. 
+In this demo,input 3.3V(GD32150R) or 5V(GD32190R)to PA1, EXTI line 21 is 
+configured to generate an interrupt on rising edge of the output signal. After 
+system start-up, enable comparator and trigger interrupt, then LED2 is on. 
+
+  Connect PA1 to +3V3 or +5V.