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docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CRC/Calculate_demo/gd32f1x0_it.c

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+/*!
+    \file  gd32f1x0_it.c
+    \brief interrupt service routines
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+#include "gd32f1x0_it.h"
+
+/*!
+    \brief      this function handles NMI exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void NMI_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles HardFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void HardFault_Handler(void)
+{
+    /* if Hard Fault exception occurs, go to infinite loop */
+    while (1);
+}
+
+/*!
+    \brief      this function handles MemManage exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void MemManage_Handler(void)
+{
+    /* if Memory Manage exception occurs, go to infinite loop */
+    while (1);
+}
+
+/*!
+    \brief      this function handles BusFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void BusFault_Handler(void)
+{
+    /* if Bus Fault exception occurs, go to infinite loop */
+    while (1);
+}
+
+/*!
+    \brief      this function handles UsageFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void UsageFault_Handler(void)
+{
+    /* if Usage Fault exception occurs, go to infinite loop */
+    while (1);
+}
+
+/*!
+    \brief      this function handles SVC exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void SVC_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles DebugMon exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void DebugMon_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles PendSV exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void PendSV_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles SysTick exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void SysTick_Handler(void)
+{
+}

docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CRC/Calculate_demo/gd32f1x0_it.h

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+/*!
+    \file  gd32f1x0_it.h
+    \brief the header file of the ISR
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+#ifndef GD32F1X0_IT_H
+#define GD32F1X0_IT_H
+
+#include "gd32f1x0.h"
+
+/* function declarations */
+/* NMI handle function */
+void NMI_Handler(void);
+/* HardFault handle function */
+void HardFault_Handler(void);
+/* MemManage handle function */
+void MemManage_Handler(void);
+/* BusFault handle function */
+void BusFault_Handler(void);
+/* UsageFault handle function */
+void UsageFault_Handler(void);
+/* SVC handle function */
+void SVC_Handler(void);
+/* DebugMon handle function */
+void DebugMon_Handler(void);
+/* PendSV handle function */
+void PendSV_Handler(void);
+/* SysTick handle function */
+void SysTick_Handler(void);
+
+#endif /* GD32F1X0_IT_H */

docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CRC/Calculate_demo/gd32f1x0_libopt.h

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+/*!
+    \file  gd32f1x0_libopt.h
+    \brief library optional for gd32f1x0
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+#ifndef GD32F1X0_LIBOPT_H
+#define GD32F1X0_LIBOPT_H
+
+#include "gd32f1x0_adc.h"
+#include "gd32f1x0_cec.h"
+#include "gd32f1x0_crc.h"
+#include "gd32f1x0_cmp.h"
+#include "gd32f1x0_dac.h"
+#include "gd32f1x0_dbg.h"
+#include "gd32f1x0_dma.h"
+#include "gd32f1x0_exti.h"
+#include "gd32f1x0_fmc.h"
+#include "gd32f1x0_gpio.h"
+#include "gd32f1x0_syscfg.h"
+#include "gd32f1x0_i2c.h"
+#include "gd32f1x0_fwdgt.h"
+#include "gd32f1x0_pmu.h"
+#include "gd32f1x0_rcu.h"
+#include "gd32f1x0_rtc.h"
+#include "gd32f1x0_spi.h"
+#include "gd32f1x0_timer.h"
+#include "gd32f1x0_usart.h"
+#include "gd32f1x0_wwdgt.h"
+#include "gd32f1x0_misc.h"
+#include "gd32f1x0_tsi.h"
+#ifdef GD32F170_190
+#include "gd32f1x0_slcd.h"
+#include "gd32f1x0_opa.h"
+#include "gd32f1x0_ivref.h"
+#include "gd32f1x0_can.h"
+#endif /* GD32F170_190 */
+
+#endif /* GD32F1X0_LIBOPT_H */

docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CRC/Calculate_demo/main.c

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+/*!
+    \file  main.c
+    \brief CRC calculate demo
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+#include "gd32f1x0.h"
+#include "systick.h"
+#include <stdio.h>
+#include "gd32f1x0_eval.h"
+
+uint32_t vab1 = 0, success_flag = 0;
+uint32_t read32_1, read32_2, read32_3, read32_4, read32_5, read32_6, read32_7, read32_8;
+
+/*!
+    \brief      main function
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+int main(void)
+{
+    gd_eval_led_init(LED1);
+
+    vab1 = (uint32_t)0xabcd1234;
+    rcu_periph_clock_enable(RCU_CRC);
+    
+    crc_deinit();
+    read32_1 = crc_single_data_calculate(vab1);
+
+    /* input reverse */
+    crc_deinit();
+    crc_input_data_reverse_config(CRC_INPUT_DATA_BYTE);
+    read32_2 = crc_single_data_calculate(vab1);
+
+    crc_deinit();
+    crc_input_data_reverse_config(CRC_INPUT_DATA_HALFWORD);
+    read32_3 = crc_single_data_calculate(vab1);
+
+    crc_deinit();
+    crc_input_data_reverse_config(CRC_INPUT_DATA_WORD);
+    read32_4 = crc_single_data_calculate(vab1);
+
+    /* output reverse */
+    crc_deinit();
+    crc_reverse_output_data_enable();
+    read32_5 = crc_single_data_calculate(vab1);
+
+    crc_deinit();
+    crc_input_data_reverse_config(CRC_INPUT_DATA_BYTE);
+    crc_reverse_output_data_enable();
+    read32_6 = crc_single_data_calculate(vab1);
+
+    crc_deinit();
+    crc_input_data_reverse_config(CRC_INPUT_DATA_HALFWORD);
+    crc_reverse_output_data_enable();
+    read32_7 = crc_single_data_calculate(vab1);
+
+    crc_deinit();
+    crc_input_data_reverse_config(CRC_INPUT_DATA_WORD);
+    crc_reverse_output_data_enable();
+    read32_8 = crc_single_data_calculate(vab1);
+
+    /* check the caculation result */
+    if((read32_1 == 0xf7018a40)&&(read32_2 == 0x49fc6721)&&(read32_3 == 0x606444e3)&&(read32_4 == 0x16d70081)
+        &&(read32_5 == 0x025180ef)&&(read32_6 == 0x84e63f92)&&(read32_7 == 0xc7222606)&&(read32_8 == 0x8100eb68)){
+        success_flag = 0x1;
+        gd_eval_led_on(LED1);
+    }
+
+    while (1);
+}

docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CRC/Calculate_demo/readme.txt

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+/*!
+    \file  readme.txt
+    \brief description of the CRC calculate demo
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+  This demo is based on the GD32150R-EVAL/GD32190R-EVAL board, it shows how to 
+configure the CRC module. In this demo, 8 CRC codes are calculated for a 32-bit
+data by configuring various control bits in the CRC control register.
+
+  If the test passes, the success_flag variable equals 0x1 and turn on the LED1.

docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CRC/Calculate_demo/systick.c

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+/*!
+    \file  systick.c
+    \brief the systick configuration file
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+#include "gd32f1x0.h"
+#include "systick.h"
+
+static uint32_t delay;
+
+/*!
+    \brief      configure systick
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void systick_config(void)
+{
+    /* setup systick timer for 1000Hz interrupts */
+    if (SysTick_Config(SystemCoreClock / 1000)){
+        /* capture error */
+        while (1);
+    }
+    /* configure the systick handler priority */
+    NVIC_SetPriority(SysTick_IRQn, 0x00);
+}
+
+/*!
+    \brief      delay a time in milliseconds
+    \param[in]  count: count in milliseconds
+    \param[out] none
+    \retval     none
+*/
+void delay_1ms(uint32_t count)
+{
+    delay = count;
+
+    while(0 != delay);
+}
+
+/*!
+    \brief      delay decrement
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void delay_decrement(void)
+{
+    if (0 != delay){ 
+        delay--;
+    }
+}

docs/GD32F1x0_Firmware_Library_v3.1.0/Examples/CRC/Calculate_demo/systick.h

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+/*!
+    \file  systick.h
+    \brief the header file of systick
+*/
+
+/*
+    Copyright (C) 2017 GigaDevice
+
+    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
+    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
+    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
+    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
+*/
+
+#ifndef SYS_TICK_H
+#define SYS_TICK_H
+
+#include <stdint.h>
+
+/* configure systick */
+void systick_config(void);
+/* delay a time in milliseconds */
+void delay_1ms(uint32_t count);
+/* delay decrement */
+void delay_decrement(void);
+
+#endif /* SYS_TICK_H */