mirror of
https://github.com/EFeru/hoverboard-sideboard-hack-GD.git
synced 2026-02-18 08:01:12 +00:00
Initial commit
This commit is contained in:
EmanuelFeru
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/*!
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\file gd32f1x0_libopt.h
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\brief library optional for gd32f1x0
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*/
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/*
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Copyright (C) 2017 GigaDevice
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2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
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2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
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2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
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2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
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*/
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#ifndef GD32F1X0_LIBOPT_H
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#define GD32F1X0_LIBOPT_H
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#include "gd32f1x0_adc.h"
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#include "gd32f1x0_cec.h"
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#include "gd32f1x0_crc.h"
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#include "gd32f1x0_cmp.h"
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#include "gd32f1x0_dac.h"
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#include "gd32f1x0_dbg.h"
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#include "gd32f1x0_dma.h"
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#include "gd32f1x0_exti.h"
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#include "gd32f1x0_fmc.h"
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#include "gd32f1x0_gpio.h"
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#include "gd32f1x0_syscfg.h"
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#include "gd32f1x0_i2c.h"
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#include "gd32f1x0_fwdgt.h"
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#include "gd32f1x0_pmu.h"
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#include "gd32f1x0_rcu.h"
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#include "gd32f1x0_rtc.h"
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#include "gd32f1x0_spi.h"
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#include "gd32f1x0_timer.h"
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#include "gd32f1x0_usart.h"
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#include "gd32f1x0_wwdgt.h"
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#include "gd32f1x0_misc.h"
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#include "gd32f1x0_tsi.h"
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#ifdef GD32F170_190
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#include "gd32f1x0_slcd.h"
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#include "gd32f1x0_opa.h"
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#include "gd32f1x0_ivref.h"
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#include "gd32f1x0_can.h"
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#endif /* GD32F170_190 */
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#endif /* GD32F1X0_LIBOPT_H */
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/*!
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\file main.c
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\brief TIMERs cascade synchro demo
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*/
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/*
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Copyright (C) 2017 GigaDevice
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2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
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2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
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2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
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2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
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*/
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#include "gd32f1x0.h"
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#include <stdio.h>
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#include "gd32f1x0_eval.h"
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void gpio_config(void);
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void timer_config(void);
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/**
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\brief configure the GPIO ports
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\param[in] none
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\param[out] none
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\retval none
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*/
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void gpio_config(void)
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{
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rcu_periph_clock_enable(RCU_GPIOA);
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rcu_periph_clock_enable(RCU_GPIOB);
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/*configure PA6(TIMER2 CH0) as alternate function*/
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gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_6);
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gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_6);
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gpio_af_set(GPIOA, GPIO_AF_1, GPIO_PIN_6);
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/*configure PB3(TIMER1 CH1) as alternate function*/
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gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_3);
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gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_3);
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gpio_af_set(GPIOB, GPIO_AF_2, GPIO_PIN_3);
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/*configure PA8(TIMER0 CH0) as alternate function*/
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gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_8);
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gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_8);
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gpio_af_set(GPIOA, GPIO_AF_2, GPIO_PIN_8);
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}
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/**
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\brief configure the TIMER peripheral
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\param[in] none
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\param[out] none
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\retval none
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*/
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void timer_config(void)
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{
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/* timers synchronisation in cascade mode ----------------------------
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1/TIMER1 is configured as master timer:
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- PWM mode is used
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- The TIMER1 update event is used as trigger output
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2/TIMER2 is slave for TIMER1 and master for TIMER0,
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- PWM mode is used
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- The ITR1(TIMER1) is used as input trigger
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- external clock mode is used,the counter counts on the rising edges of
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the selected trigger.
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- the TIMER2 update event is used as trigger output.
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3/TIMER0 is slave for TIMER2,
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- PWM mode is used
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- The ITR2(TIMER2) is used as input trigger
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- external clock mode is used,the counter counts on the rising edges of
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the selected trigger.
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-------------------------------------------------------------------- */
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timer_oc_parameter_struct timer_ocintpara;
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timer_parameter_struct timer_initpara;
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rcu_periph_clock_enable(RCU_TIMER0);
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rcu_periph_clock_enable(RCU_TIMER1);
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rcu_periph_clock_enable(RCU_TIMER2);
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/* TIMER1 configuration */
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timer_deinit(TIMER1);
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timer_initpara.prescaler = 3599;
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timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
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timer_initpara.counterdirection = TIMER_COUNTER_UP;
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timer_initpara.period = 3999;
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timer_initpara.clockdivision = TIMER_CKDIV_DIV1;
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timer_initpara.repetitioncounter = 0;
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timer_init(TIMER1,&timer_initpara);
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/* CH1 configuration in PWM1 mode */
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timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
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timer_ocintpara.outputnstate = TIMER_CCXN_DISABLE;
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timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
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timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH;
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timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_LOW;
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timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
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timer_channel_output_config(TIMER1, TIMER_CH_1, &timer_ocintpara);
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timer_channel_output_pulse_value_config(TIMER1, TIMER_CH_1, 1999);
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timer_channel_output_mode_config(TIMER1, TIMER_CH_1, TIMER_OC_MODE_PWM1);
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timer_channel_output_shadow_config(TIMER1, TIMER_CH_1, TIMER_OC_SHADOW_DISABLE);
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/* auto-reload preload enable */
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timer_auto_reload_shadow_enable(TIMER1);
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/* select the master slave mode */
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timer_master_slave_mode_config(TIMER1, TIMER_MASTER_SLAVE_MODE_ENABLE);
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/* TIMER1 update event is used as trigger output */
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timer_master_output_trigger_source_select(TIMER1, TIMER_TRI_OUT_SRC_UPDATE);
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/* TIMER2 configuration */
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timer_deinit(TIMER2);
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timer_initpara.prescaler = 0;
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timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
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timer_initpara.counterdirection = TIMER_COUNTER_UP;
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timer_initpara.period = 1;
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timer_initpara.clockdivision = TIMER_CKDIV_DIV1;
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timer_initpara.repetitioncounter = 0;
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timer_init(TIMER2,&timer_initpara);
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/* CH0 configuration in PWM1 mode */
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timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
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timer_ocintpara.outputnstate = TIMER_CCXN_DISABLE;
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timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
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timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH;
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timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_LOW;
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timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
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timer_channel_output_config(TIMER2, TIMER_CH_0, &timer_ocintpara);
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timer_channel_output_pulse_value_config(TIMER2, TIMER_CH_0, 1);
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timer_channel_output_mode_config(TIMER2, TIMER_CH_0, TIMER_OC_MODE_PWM1);
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timer_channel_output_shadow_config(TIMER2, TIMER_CH_0, TIMER_OC_SHADOW_DISABLE);
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/* auto-reload preload enable */
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timer_auto_reload_shadow_enable(TIMER2);
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/* slave mode selection: TIMER2 */
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timer_slave_mode_select(TIMER2, TIMER_SLAVE_MODE_EXTERNAL0);
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timer_input_trigger_source_select(TIMER2, TIMER_SMCFG_TRGSEL_ITI1);
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/* select the master slave mode */
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timer_master_slave_mode_config(TIMER2, TIMER_MASTER_SLAVE_MODE_ENABLE);
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/* TIMER2 update event is used as trigger output */
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timer_master_output_trigger_source_select(TIMER2, TIMER_TRI_OUT_SRC_UPDATE);
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/* TIMER0 configuration */
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timer_deinit(TIMER0);
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timer_initpara.prescaler = 0;
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timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
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timer_initpara.counterdirection = TIMER_COUNTER_UP;
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timer_initpara.period = 1;
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timer_initpara.clockdivision = TIMER_CKDIV_DIV1;
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timer_initpara.repetitioncounter = 0;
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timer_init(TIMER0,&timer_initpara);
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/* CH0 configuration in PWM1 mode */
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timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
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timer_ocintpara.outputnstate = TIMER_CCXN_DISABLE;
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timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
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timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH;
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timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_LOW;
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timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
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timer_channel_output_config(TIMER0, TIMER_CH_0, &timer_ocintpara);
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timer_channel_output_pulse_value_config(TIMER0, TIMER_CH_0, 1);
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timer_channel_output_mode_config(TIMER0, TIMER_CH_0, TIMER_OC_MODE_PWM1);
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timer_channel_output_shadow_config(TIMER0, TIMER_CH_0, TIMER_OC_SHADOW_DISABLE);
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/* auto-reload preload enable */
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timer_auto_reload_shadow_enable(TIMER0);
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/* TIMER0 output enable */
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timer_primary_output_config(TIMER0,ENABLE);
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/* slave mode selection: TIMER0 */
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timer_slave_mode_select(TIMER0, TIMER_SLAVE_MODE_EXTERNAL0);
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timer_input_trigger_source_select(TIMER0, TIMER_SMCFG_TRGSEL_ITI2);
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/* TIMER counter enable */
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timer_enable(TIMER1);
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timer_enable(TIMER2);
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timer_enable(TIMER0);
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}
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/*!
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\brief main function
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\param[in] none
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\param[out] none
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\retval none
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*/
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int main(void)
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{
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gpio_config();
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timer_config();
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while (1);
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}
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@@ -0,0 +1,55 @@
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/*!
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\file readme.txt
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\brief description of the TIMERs cascade synchro demo
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*/
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/*
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Copyright (C) 2017 GigaDevice
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2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
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2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
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2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
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2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
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*/
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This demo is based on the GD32150R-EVAL/GD32190R-EVAL board, it shows how to
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synchronize TIMER peripherals in cascade mode.
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In this example three timers are used:
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1/TIMER1 is configured as master timer:
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- PWM mode is used
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- The TIMER1 update event is used as trigger output
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2/TIMER2 is slave for TIMER1 and master for TIMER0,
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- PWM mode is used
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- The ITR0(TIMER1) is used as input trigger
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- External clock mode is used,the counter counts on the rising edges of
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the selected trigger.
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- The TIMER2 update event is used as trigger output.
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3/TIMER0 is slave for TIMER2,
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- PWM mode is used
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- The ITR1(TIMER2) is used as input trigger
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- External clock mode is used,the counter counts on the rising edges of
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the selected trigger.
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The TIMERxCLK is fixed to 72 MHz, the TIMER1 counter clock is :
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108MHz/3600 = 20 KHz.
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The master timer TIMER1 is running at TIMER1 frequency :
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TIMER1 frequency = (TIMER1 counter clock)/ (TIMER1 period + 1) = 5 Hz
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and the duty cycle = TIMER1_CH1CV/(TIMER1_CAR + 1) = 50%
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The TIMER2 is running:
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- At (TIMER1 frequency)/ (TIMER2 period + 1) = 2.5 Hz and a duty cycle
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equal to TIMER2_CH0CV/(TIMER2_CAR + 1) = 50%
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The TIMER0 is running:
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- At (TIMER2 frequency)/ (TIMER0 period + 1) = 1.25 Hz and a duty cycle
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equal to TIMER0_CH0CV/(TIMER0_CAR + 1) = 50%
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Connect the three pins to a logic analyzer to monitor the different waveforms:
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- TIMER1_CH1 pin (PB3)
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- TIMER2_CH0 pin (PA6)
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- TIMER0_CH0 pin (PA8)
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