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73 lines
3.1 KiB
C
73 lines
3.1 KiB
C
/*!
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\file gd32f1x0_wwdgt.h
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\brief definitions for the WWDGT
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*/
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/*
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Copyright (C) 2017 GigaDevice
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2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
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2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
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2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
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2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
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*/
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#ifndef GD32F1X0_WWDGT_H
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#define GD32F1X0_WWDGT_H
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#include "gd32f1x0.h"
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/* WWDGT definitions */
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#define WWDGT WWDGT_BASE
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/* registers definitions */
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#define WWDGT_CTL REG32((WWDGT) + 0x00U) /*!< WWDGT control register */
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#define WWDGT_CFG REG32((WWDGT) + 0x04U) /*!< WWDGT configuration register */
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#define WWDGT_STAT REG32((WWDGT) + 0x08U) /*!< WWDGT status register */
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/* bits definitions */
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/* WWDGT_CTL */
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#define WWDGT_CTL_CNT BITS(0,6) /*!< WWDGT counter value */
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#define WWDGT_CTL_WDGTEN BIT(7) /*!< WWDGT counter enable */
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/* WWDGT_CFG */
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#define WWDGT_CFG_WIN BITS(0,6) /*!< WWDGT counter window value */
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#define WWDGT_CFG_PSC BITS(7,8) /*!< WWDGT prescaler divider value */
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#define WWDGT_CFG_EWIE BIT(9) /*!< early wakeup interrupt enable */
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/* WWDGT_STAT */
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#define WWDGT_STAT_EWIF BIT(0) /*!< early wakeup interrupt flag */
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/* constants definitions */
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/* ctl register value */
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#define CTL_CNT(regval) (BITS(0,6) & ((uint32_t)(regval) << 0U)) /*!< write value to WWDGT_CTL_CNT bit field */
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/* cfg register value */
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#define CFG_WIN(regval) (BITS(0,6) & ((uint32_t)(regval) << 0U)) /*!< write value to WWDGT_CFG_WIN bit field */
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#define CFG_PSC(regval) (BITS(7,8) & ((uint32_t)(regval) << 7U)) /*!< write value to WWDGT_CFG_PSC bit field */
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#define WWDGT_CFG_PSC_DIV1 ((uint32_t)CFG_PSC(0)) /*!< the time base of WWDGT = (PCLK1/4096)/1 */
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#define WWDGT_CFG_PSC_DIV2 ((uint32_t)CFG_PSC(1)) /*!< the time base of WWDGT = (PCLK1/4096)/2 */
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#define WWDGT_CFG_PSC_DIV4 ((uint32_t)CFG_PSC(2)) /*!< the time base of WWDGT = (PCLK1/4096)/4 */
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#define WWDGT_CFG_PSC_DIV8 ((uint32_t)CFG_PSC(3)) /*!< the time base of WWDGT = (PCLK1/4096)/8 */
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/* function declarations */
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/* reset the window watchdog timer configuration */
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void wwdgt_deinit(void);
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/* start the window watchdog timer counter */
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void wwdgt_enable(void);
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/* configure the window watchdog timer counter value */
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void wwdgt_counter_update(uint16_t counter_value);
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/* configure counter value, window value, and prescaler divider value */
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void wwdgt_config(uint16_t counter, uint16_t window, uint32_t prescaler);
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/* enable early wakeup interrupt of WWDGT */
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void wwdgt_interrupt_enable(void);
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/* check early wakeup interrupt state of WWDGT */
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FlagStatus wwdgt_flag_get(void);
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/* clear early wakeup interrupt state of WWDGT */
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void wwdgt_flag_clear(void);
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#endif /* GD32F1X0_WWDGT_H */
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