mirror of
https://github.com/EFeru/hoverboard-sideboard-hack-GD.git
synced 2025-07-27 17:49:32 +00:00
1163 lines
35 KiB
C
1163 lines
35 KiB
C
/*!
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\file gd32f1x0_usart.c
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\brief USART driver
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*/
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/*
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Copyright (C) 2017 GigaDevice
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2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
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2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
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2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
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2017-06-19, V3.1.1, firmware update for GD32F1x0(x=3,5,7,9)
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*/
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#include "gd32f1x0_usart.h"
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#include "gd32f1x0_rcu.h"
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/*!
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\brief reset USART
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\param[in] usart_periph: USARTx(x=0,1)
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\param[out] none
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\retval none
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*/
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void usart_deinit(uint32_t usart_periph)
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{
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switch(usart_periph){
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case USART0:
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rcu_periph_reset_enable(RCU_USART0RST);
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rcu_periph_reset_disable(RCU_USART0RST);
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break;
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case USART1:
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rcu_periph_reset_enable(RCU_USART1RST);
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rcu_periph_reset_disable(RCU_USART1RST);
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break;
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default:
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break;
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}
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}
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/*!
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\brief configure USART baud rate value
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] baudval: baud rate value
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\param[out] none
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\retval none
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*/
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void usart_baudrate_set(uint32_t usart_periph, uint32_t baudval)
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{
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uint32_t uclk = 0U, intdiv = 0U, fradiv = 0U, udiv = 0U;
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switch(usart_periph){
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case USART0:
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uclk = rcu_clock_freq_get(CK_USART);
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break;
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case USART1:
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uclk = rcu_clock_freq_get(CK_APB1);
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break;
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default:
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break;
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}
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if(USART_CTL0(usart_periph) & USART_CTL0_OVSMOD){
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/* when oversampling by 8,configure the value of USART_BAUD */
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udiv = ((2U*uclk)+baudval/2U)/baudval;
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intdiv = udiv & 0xfff0U;
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fradiv = (udiv>>1U) & 0x7U;
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USART_BAUD(usart_periph) = ((USART_BAUD_FRADIV | USART_BAUD_INTDIV) & (intdiv | fradiv));
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}else{
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/* when oversampling by 16,configure the value of USART_BAUD */
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udiv = (uclk+baudval/2U)/baudval;
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intdiv = udiv & 0xfff0U;
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fradiv = udiv & 0xfU;
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USART_BAUD(usart_periph) = ((USART_BAUD_FRADIV | USART_BAUD_INTDIV) & (intdiv | fradiv));
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}
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}
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/*!
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\brief configure USART parity
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] paritycfg: USART parity configure
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\arg USART_PM_NONE: no parity
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\arg USART_PM_ODD: odd parity
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\arg USART_PM_EVEN: even parity
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\param[out] none
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\retval none
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*/
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void usart_parity_config(uint32_t usart_periph, uint32_t paritycfg)
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{
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/* disable USART */
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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/* clear USART_CTL0 PM,PCEN bits */
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USART_CTL0(usart_periph) &= ~(USART_CTL0_PM | USART_CTL0_PCEN);
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/* configure USART parity mode */
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USART_CTL0(usart_periph) |= paritycfg;
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}
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/*!
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\brief configure USART word length
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] wlen: USART word length configure
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\arg USART_WL_8BIT: 8 bits
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\arg USART_WL_9BIT: 9 bits
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\param[out] none
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\retval none
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*/
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void usart_word_length_set(uint32_t usart_periph, uint32_t wlen)
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{
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/* disable USART */
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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/* clear USART_CTL0 WL bit */
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USART_CTL0(usart_periph) &= ~USART_CTL0_WL;
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/* configure USART word length */
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USART_CTL0(usart_periph) |= wlen;
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}
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/*!
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\brief configure USART stop bit length
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] stblen: USART stop bit configure
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\arg USART_STB_1BIT: 1 bit
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\arg USART_STB_2BIT: 2 bits
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\arg USART_STB_1_5BIT: 1.5bit
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\param[out] none
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\retval none
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*/
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void usart_stop_bit_set(uint32_t usart_periph, uint32_t stblen)
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{
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/* disable USART */
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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/* clear USART_CTL1 STB bits */
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USART_CTL1(usart_periph) &= ~USART_CTL1_STB;
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USART_CTL1(usart_periph) |= stblen;
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}
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/*!
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\brief enable USART
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\param[in] usart_periph: USARTx(x=0,1)
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\param[out] none
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\retval none
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*/
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void usart_enable(uint32_t usart_periph)
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{
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USART_CTL0(usart_periph) |= USART_CTL0_UEN;
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}
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/*!
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\brief disable USART
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\param[in] usart_periph: USARTx(x=0,1)
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\param[out] none
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\retval none
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*/
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void usart_disable(uint32_t usart_periph)
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{
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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}
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/*!
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\brief configure USART transmitter
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] txconfig: enable or disable USART transmitter
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\arg USART_TRANSMIT_ENABLE: enable USART transmission
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\arg USART_TRANSMIT_DISABLE: enable USART transmission
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\param[out] none
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\retval none
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*/
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void usart_transmit_config(uint32_t usart_periph, uint32_t txconfig)
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{
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USART_CTL0(usart_periph) &= ~USART_CTL0_TEN;
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/* configure transfer mode */
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USART_CTL0(usart_periph) |= txconfig;
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}
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/*!
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\brief configure USART receiver
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] rxconfig: enable or disable USART receiver
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\arg USART_RECEIVE_ENABLE: enable USART reception
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\arg USART_RECEIVE_DISABLE: disable USART reception
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\param[out] none
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\retval none
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*/
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void usart_receive_config(uint32_t usart_periph, uint32_t rxconfig)
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{
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USART_CTL0(usart_periph) &= ~USART_CTL0_REN;
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/* configure receiver mode */
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USART_CTL0(usart_periph) |= rxconfig;
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}
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/*!
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\brief USART transmit data function
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] data: data of transmission
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\param[out] none
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\retval none
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*/
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void usart_data_transmit(uint32_t usart_periph, uint32_t data)
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{
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USART_TDATA(usart_periph) = (USART_TDATA_TDATA & data);
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}
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/*!
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\brief USART receive data function
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\param[in] usart_periph: USARTx(x=0,1)
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\param[out] none
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\retval data of received
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*/
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uint16_t usart_data_receive(uint32_t usart_periph)
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{
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return (uint16_t)(GET_BITS(USART_RDATA(usart_periph), 0U, 8U));
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}
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/*!
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\brief data is transmitted/received with the LSB/MSB first
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] msbf: LSB/MSB
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\arg USART_MSBF_LSB: LSB first
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\arg USART_MSBF_MSB: MSB first
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\param[out] none
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\retval none
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*/
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void usart_data_first_config(uint32_t usart_periph, uint32_t msbf)
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{
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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/* configure LSB or MSB first */
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USART_CTL1(usart_periph) &= ~(USART_CTL1_MSBF);
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USART_CTL1(usart_periph) |= (USART_CTL1_MSBF & msbf) ;
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}
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/*!
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\brief USART inverted configure
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] invertpara: refer to usart_invert_enum
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\param[out] none
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\retval none
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*/
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void usart_invert_config(uint32_t usart_periph, usart_invert_enum invertpara)
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{
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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/* inverted or not the specified signal */
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switch(invertpara){
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case USART_DINV_ENABLE:
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USART_CTL1(usart_periph) |= USART_CTL1_DINV;
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break;
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case USART_DINV_DISABLE:
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USART_CTL1(usart_periph) &= ~(USART_CTL1_DINV);
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break;
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case USART_TXPIN_DISABLE:
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USART_CTL1(usart_periph) &= ~(USART_CTL1_TINV);
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break;
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case USART_RXPIN_DISABLE:
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USART_CTL1(usart_periph) &= ~(USART_CTL1_RINV);
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break;
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case USART_SWAP_DISABLE:
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USART_CTL1(usart_periph) &= ~(USART_CTL1_STRP);
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break;
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case USART_TXPIN_ENABLE:
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USART_CTL1(usart_periph) |= USART_CTL1_TINV;
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break;
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case USART_RXPIN_ENABLE:
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USART_CTL1(usart_periph) |= USART_CTL1_RINV;
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break;
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case USART_SWAP_ENABLE:
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USART_CTL1(usart_periph) |= USART_CTL1_STRP;
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break;
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default:
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break;
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}
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}
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/*!
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\brief overrun function is enabled
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\param[in] usart_periph: USARTx(x=0,1)
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\param[out] none
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\retval none
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*/
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void usart_overrun_enable(uint32_t usart_periph)
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{
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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USART_CTL2(usart_periph) &= ~(USART_CTL2_OVRD);
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}
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/*!
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\brief overrun function is disabled
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\param[in] usart_periph: USARTx(x=0,1)
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\param[out] none
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\retval none
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*/
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void usart_overrun_disable(uint32_t usart_periph)
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{
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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USART_CTL2(usart_periph) |= USART_CTL2_OVRD;
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}
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/*!
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\brief configure the USART oversample mode
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] oversamp: oversample value
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\arg USART_OVSMOD_8: oversampling by 8
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\arg USART_OVSMOD_16: oversampling by 16
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\param[out] none
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\retval none
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*/
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void usart_oversample_config(uint32_t usart_periph, uint32_t oversamp)
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{
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/* disable USART */
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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/* clear OVSMOD bit */
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USART_CTL0(usart_periph) &= ~(USART_CTL0_OVSMOD);
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USART_CTL0(usart_periph) |= oversamp;
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}
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/*!
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\brief sample bit method configure
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] osb: sample bit
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\arg USART_OSB_1BIT: 1 bit
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\arg USART_OSB_3BIT: 3 bits
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\param[out] none
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\retval none
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*/
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void usart_sample_bit_config(uint32_t usart_periph, uint32_t osb)
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{
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/* disable USART */
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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USART_CTL2(usart_periph) &= ~(USART_CTL2_OSB);
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USART_CTL2(usart_periph) |= (osb);
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}
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/*!
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\brief auto baud rate detection enable
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\param[in] usart_periph: USARTx(x=0)
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\param[out] none
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\retval none
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*/
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void usart_autobaud_detection_enable(uint32_t usart_periph)
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{
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USART_CTL1(usart_periph) |= USART_CTL1_ABDEN;
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}
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/*!
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\brief auto baud rate detection disable
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\param[in] usart_periph: USARTx(x=0)
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\param[out] none
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\retval none
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*/
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void usart_autobaud_detection_disable(uint32_t usart_periph)
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{
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USART_CTL1(usart_periph) &= ~(USART_CTL1_ABDEN);
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}
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/*!
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\brief auto baud rate detection mode configure
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\param[in] usart_periph: USARTx(x=0)
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\param[in] abdmod: auto baud rate detection mode
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\arg USART_ABDM_FTOR: falling edge to rising edge measurement
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\arg USART_ABDM_FTOF: falling edge to falling edge measurement
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\param[out] none
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\retval none
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*/
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void usart_autobaud_detection_mode_config(uint32_t usart_periph, uint32_t abdmod)
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{
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/* reset ABDM bits */
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USART_CTL1(usart_periph) &= ~(USART_CTL1_ABDM);
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USART_CTL1(usart_periph) |= (abdmod);
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}
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/*!
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\brief mute mode enable
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\param[in] usart_periph: USARTx(x=0,1)
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\param[out] none
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\retval none
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*/
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void usart_mute_mode_enable(uint32_t usart_periph)
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{
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USART_CTL0(usart_periph) |= USART_CTL0_MEN;
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}
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/*!
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\brief mute mode disable
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\param[in] usart_periph: USARTx(x=0,1)
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\param[out] none
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\retval none
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*/
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void usart_mute_mode_disable(uint32_t usart_periph)
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{
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USART_CTL0(usart_periph) &= ~(USART_CTL0_MEN);
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}
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/*!
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\brief wakeup method in mute mode configure
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] wmethod: two methods be used to enter or exit the mute mode
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\arg USART_WM_IDLE: idle line
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\arg USART_WM_ADDR: address mark
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\param[out] none
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\retval none
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*/
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void usart_mute_mode_wakeup_config(uint32_t usart_periph, uint32_t wmethod)
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{
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/* disable USART */
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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USART_CTL0(usart_periph) &= ~(USART_CTL0_WM);
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USART_CTL0(usart_periph) |= wmethod;
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}
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/*!
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\brief address detection mode configure
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] addmod: address detection mode
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\arg USART_ADDM_4BIT: 4 bits
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\arg USART_ADDM_FULLBIT: full bits
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\param[out] none
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\retval none
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*/
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void usart_address_detection_mode_config(uint32_t usart_periph, uint32_t addmod)
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{
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/* disable USART */
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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USART_CTL1(usart_periph) &= ~(USART_CTL1_ADDM);
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USART_CTL1(usart_periph) |= (USART_CTL1_ADDM & (addmod));
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}
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/*!
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\brief address of the USART terminal
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\param[in] usart_periph: USARTx(x=0,1)
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\param[in] addr: 0x00-0xFF, address of USART terminal
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\param[out] none
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\retval none
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*/
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void usart_address_config(uint32_t usart_periph, uint8_t addr)
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{
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/* disable USART */
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USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
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USART_CTL1(usart_periph) &= ~(USART_CTL1_ADDR);
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USART_CTL1(usart_periph) |= (USART_CTL1_ADDR & (((uint32_t)addr) << 24));
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}
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/*!
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\brief receiver timeout enable
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\param[in] usart_periph: USARTx(x=0)
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\param[out] none
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\retval none
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*/
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void usart_receiver_timeout_enable(uint32_t usart_periph)
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{
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USART_CTL1(usart_periph) |= USART_CTL1_RTEN;
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}
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/*!
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\brief receiver timeout disable
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\param[in] usart_periph: USARTx(x=0)
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\param[out] none
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\retval none
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*/
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void usart_receiver_timeout_disable(uint32_t usart_periph)
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{
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USART_CTL1(usart_periph) &= ~(USART_CTL1_RTEN);
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}
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|
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/*!
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\brief receiver timeout threshold configure
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\param[in] usart_periph: USARTx(x=0)
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\param[in] rtimeout: 0x000000-0xFFFFFF, receiver timeout value in terms of number of baud clocks
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\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_receiver_timeout_config(uint32_t usart_periph, uint32_t rtimeout)
|
|
{
|
|
USART_RT(usart_periph) &= ~(USART_RT_RT);
|
|
USART_RT(usart_periph) |= (rtimeout);
|
|
}
|
|
|
|
/*!
|
|
\brief LIN mode enable
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_lin_mode_enable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL1(usart_periph) |= USART_CTL1_LMEN;
|
|
}
|
|
|
|
/*!
|
|
\brief LIN mode disable
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_lin_mode_disable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN);
|
|
}
|
|
|
|
/*!
|
|
\brief LIN break detection length
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[in] lblen: LIN break detection length
|
|
\arg USART_LBLEN_10B: 10 bits break detection
|
|
\arg USART_LBLEN_11B: 11 bits break detection
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_lin_break_dection_length_config(uint32_t usart_periph, uint32_t lblen)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL1(usart_periph) |= (USART_CTL1_LBLEN & (lblen));
|
|
}
|
|
|
|
/*!
|
|
\brief half-duplex enable
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_halfduplex_enable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) |= USART_CTL2_HDEN;
|
|
}
|
|
|
|
/*!
|
|
\brief half-duplex disable
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_halfduplex_disable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) &= ~(USART_CTL2_HDEN);
|
|
}
|
|
|
|
/*!
|
|
\brief clock enable
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_clock_enable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL1(usart_periph) |= USART_CTL1_CKEN;
|
|
}
|
|
|
|
/*!
|
|
\brief clock disable
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_clock_disable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN);
|
|
}
|
|
|
|
/*!
|
|
\brief configure USART synchronous mode parameters
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] clen: last bit clock pulse
|
|
\arg USART_CLEN_NONE: clock pulse of the last data bit (MSB) is not output to the CK pin
|
|
\arg USART_CLEN_EN: clock pulse of the last data bit (MSB) is output to the CK pin
|
|
\param[in] cph: clock phase
|
|
\arg USART_CPH_1CK: first clock transition is the first data capture edge
|
|
\arg USART_CPH_2CK: second clock transition is the first data capture edge
|
|
\param[in] cpl: clock polarity
|
|
\arg USART_CPL_LOW: steady low value on CK pin
|
|
\arg USART_CPL_HIGH: steady high value on CK pin
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_synchronous_clock_config(uint32_t usart_periph, uint32_t clen, uint32_t cph, uint32_t cpl)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
/* reset USART_CTL1 CLEN,CPH,CPL bits */
|
|
USART_CTL1(usart_periph) &= ~(USART_CTL1_CLEN | USART_CTL1_CPH | USART_CTL1_CPL);
|
|
|
|
USART_CTL1(usart_periph) |= (USART_CTL1_CLEN & clen);
|
|
USART_CTL1(usart_periph) |= (USART_CTL1_CPH & cph);
|
|
USART_CTL1(usart_periph) |= (USART_CTL1_CPL & cpl);
|
|
}
|
|
|
|
/*!
|
|
\brief smartcard mode enable
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_smartcard_mode_enable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) |= USART_CTL2_SCEN;
|
|
}
|
|
|
|
/*!
|
|
\brief smartcard mode disable
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_smartcard_mode_disable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) &= ~(USART_CTL2_SCEN);
|
|
}
|
|
|
|
/*!
|
|
\brief NACK enable in smartcard mode
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_smartcard_mode_nack_enable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) |= USART_CTL2_NKEN;
|
|
}
|
|
|
|
/*!
|
|
\brief NACK disable in smartcard mode
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_smartcard_mode_nack_disable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) &= ~(USART_CTL2_NKEN);
|
|
}
|
|
|
|
/*!
|
|
\brief guard time value configure in smartcard mode
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[in] guat: 0x00-0xFF
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_guard_time_config(uint32_t usart_periph, uint32_t guat)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_GP(usart_periph) &= ~(USART_GP_GUAT);
|
|
USART_GP(usart_periph) |= (USART_GP_GUAT & ((guat) << 8));
|
|
}
|
|
|
|
/*!
|
|
\brief block length configure
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[in] bl: 0x00-0xFF
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_block_length_config(uint32_t usart_periph, uint32_t bl)
|
|
{
|
|
USART_RT(usart_periph) &= ~(USART_RT_BL);
|
|
USART_RT(usart_periph) |= (USART_RT_BL & ((bl) << 24));
|
|
}
|
|
|
|
/*!
|
|
\brief smartcard auto-retry number configure
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[in] scrtnum: 0x0-0x7, smartcard auto-retry number
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_smartcard_autoretry_config(uint32_t usart_periph, uint32_t scrtnum)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) &= ~(USART_CTL2_SCRTNUM);
|
|
USART_CTL2(usart_periph) |= (USART_CTL2_SCRTNUM & ((scrtnum) << 17));
|
|
}
|
|
|
|
/*!
|
|
\brief IrDA mode enable
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_irda_mode_enable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) |= USART_CTL2_IREN;
|
|
}
|
|
|
|
/*!
|
|
\brief IrDA mode disable
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_irda_mode_disable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) &= ~(USART_CTL2_IREN);
|
|
}
|
|
|
|
/*!
|
|
\brief IrDA low-power configure
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[in] irlp: IrDA low-power or normal
|
|
\arg USART_IRLP_LOW: low-power
|
|
\arg USART_IRLP_NORMAL: normal
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_irda_lowpower_config(uint32_t usart_periph, uint32_t irlp)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) |= (USART_CTL2_IRLP & irlp);
|
|
}
|
|
|
|
/*!
|
|
\brief configure the peripheral clock prescaler in USART IrDA low-power mode or in USART SmartCard mode
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[in] psc: 0x00-0xFF
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_prescaler_config(uint32_t usart_periph, uint32_t psc)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_GP(usart_periph) &= ~(USART_GP_PSC);
|
|
USART_GP(usart_periph) |= psc;
|
|
}
|
|
|
|
/*!
|
|
\brief configure hardware flow control RTS
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] rtsconfig: enable or disable RTS
|
|
\arg USART_RTS_ENABLE: enable RTS
|
|
\arg USART_RTS_DISABLE: disable RTS
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_hardware_flow_rts_config(uint32_t usart_periph, uint32_t rtsconfig)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) &= ~(USART_CTL2_RTSEN);
|
|
USART_CTL2(usart_periph) |= rtsconfig;
|
|
}
|
|
|
|
/*!
|
|
\brief configure hardware flow control CTS
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] ctsconfig: enable or disable CTS
|
|
\arg USART_CTS_ENABLE: enable CTS
|
|
\arg USART_CTS_DISABLE: disable CTS
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_hardware_flow_cts_config(uint32_t usart_periph, uint32_t ctsconfig)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) &= ~USART_CTL2_CTSEN;
|
|
USART_CTL2(usart_periph) |= ctsconfig;
|
|
}
|
|
|
|
/*!
|
|
\brief RS485 driver enable
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_rs485_driver_enable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) |= USART_CTL2_DEM;
|
|
}
|
|
|
|
/*!
|
|
\brief RS485 driver disable
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_rs485_driver_disable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL2(usart_periph) &= ~(USART_CTL2_DEM);
|
|
}
|
|
|
|
/*!
|
|
\brief driver enable assertion time configure
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] deatime: 0x00-0x1F
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_driver_assertime_config(uint32_t usart_periph, uint32_t deatime)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_DEA);
|
|
USART_CTL0(usart_periph) |= (USART_CTL0_DEA & ((deatime) << 21));
|
|
}
|
|
|
|
/*!
|
|
\brief driver enable de-assertion time configure
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] dedtime: 0x00-0x1F
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_driver_deassertime_config(uint32_t usart_periph, uint32_t dedtime)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_DED);
|
|
USART_CTL0(usart_periph) |= (USART_CTL0_DED & ((dedtime) << 16));
|
|
}
|
|
|
|
/*!
|
|
\brief configure driver enable polarity mode
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] dep: DE signal
|
|
\arg USART_DEP_HIGH: DE signal is active high
|
|
\arg USART_DEP_LOW: DE signal is active low
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_depolarity_config(uint32_t usart_periph, uint32_t dep)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
/* reset DEP bit */
|
|
USART_CTL2(usart_periph) &= ~(USART_CTL2_DEP);
|
|
USART_CTL2(usart_periph) |= (USART_CTL2_DEP & dep);
|
|
}
|
|
|
|
/*!
|
|
\brief configure USART DMA reception
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] dmacmd: enable or disable DMA for reception
|
|
\arg USART_DENR_ENABLE: DMA enable for reception
|
|
\arg USART_DENR_DISABLE: DMA disable for reception
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_dma_receive_config(uint32_t usart_periph, uint32_t dmacmd)
|
|
{
|
|
USART_CTL2(usart_periph) &= ~USART_CTL2_DENR;
|
|
/* configure DMA reception */
|
|
USART_CTL2(usart_periph) |= dmacmd;
|
|
}
|
|
|
|
/*!
|
|
\brief configure USART DMA transmission
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] dmacmd: enable or disable DMA for transmission
|
|
\arg USART_DENT_ENABLE: DMA enable for transmission
|
|
\arg USART_DENT_DISABLE: DMA disable for transmission
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_dma_transmit_config(uint32_t usart_periph, uint32_t dmacmd)
|
|
{
|
|
USART_CTL2(usart_periph) &= ~USART_CTL2_DENT;
|
|
/* configure DMA transmission */
|
|
USART_CTL2(usart_periph) |= dmacmd;
|
|
}
|
|
|
|
/*!
|
|
\brief disable DMA on reception error
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_reception_error_dma_disable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
USART_CTL2(usart_periph) |= USART_CTL2_DDRE;
|
|
}
|
|
|
|
/*!
|
|
\brief enable DMA on reception error
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_reception_error_dma_enable(uint32_t usart_periph)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
USART_CTL2(usart_periph) &= ~(USART_CTL2_DDRE);
|
|
}
|
|
|
|
/*!
|
|
\brief USART be able to wake up the MCU from deep-sleep mode
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_wakeup_enable(uint32_t usart_periph)
|
|
{
|
|
USART_CTL0(usart_periph) |= USART_CTL0_UESM;
|
|
}
|
|
|
|
/*!
|
|
\brief USART be not able to wake up the MCU from deep-sleep mode
|
|
\param[in] usart_periph: USARTx(x=0)
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|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_wakeup_disable(uint32_t usart_periph)
|
|
{
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UESM);
|
|
}
|
|
|
|
/*!
|
|
\brief wakeup mode from deep-sleep mode
|
|
\param[in] usart_periph: USARTx(x=0)
|
|
\param[in] wum: wakeup mode
|
|
\arg USART_WUM_ADDR: WUF active on address match
|
|
\arg USART_WUM_STARTB: WUF active on start bit
|
|
\arg USART_WUM_RBNE: WUF active on RBNE
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_wakeup_mode_config(uint32_t usart_periph, uint32_t wum)
|
|
{
|
|
/* disable USART */
|
|
USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
|
|
/* reset WUM bit */
|
|
USART_CTL2(usart_periph) &= ~(USART_CTL2_WUM);
|
|
USART_CTL2(usart_periph) |= (USART_CTL2_WUM & (wum));
|
|
}
|
|
|
|
/*!
|
|
\brief get flag in STAT register
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] flag: flag type
|
|
\arg USART_FLAG_PERR: parity error flag
|
|
\arg USART_FLAG_FERR: frame error flag
|
|
\arg USART_FLAG_NERR: noise error flag
|
|
\arg USART_FLAG_ORERR: overrun error
|
|
\arg USART_FLAG_IDLE: idle line detected flag
|
|
\arg USART_FLAG_RBNE: read data buffer not empty
|
|
\arg USART_FLAG_TC: transmission completed
|
|
\arg USART_FLAG_TBE: transmit data register empty
|
|
\arg USART_FLAG_LBD: LIN break detected flag
|
|
\arg USART_FLAG_CTSF: CTS change flag
|
|
\arg USART_FLAG_CTS: CTS level
|
|
\arg USART_FLAG_RT: receiver timeout flag
|
|
\arg USART_FLAG_EB: end of block flag
|
|
\arg USART_FLAG_ABDE: auto baudrate detection error
|
|
\arg USART_FLAG_ABD: auto baudrate detection flag
|
|
\arg USART_FLAG_BSY: busy flag
|
|
\arg USART_FLAG_AM: address match flag
|
|
\arg USART_FLAG_SB: send break flag
|
|
\arg USART_FLAG_RWU: receiver wakeup from mute mode.
|
|
\arg USART_FLAG_WU: wakeup from deep-sleep mode flag
|
|
\arg USART_FLAG_TEA: transmit enable acknowledge flag
|
|
\arg USART_FLAG_REA: receive enable acknowledge flag
|
|
\param[out] none
|
|
\retval FlagStatus: SET or RESET
|
|
*/
|
|
FlagStatus usart_flag_get(uint32_t usart_periph, usart_flag_enum flag)
|
|
{
|
|
if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){
|
|
return SET;
|
|
}else{
|
|
return RESET;
|
|
}
|
|
}
|
|
|
|
/*!
|
|
\brief clear USART status
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] flag: flag type
|
|
\arg USART_FLAG_PERR: parity error flag
|
|
\arg USART_FLAG_FERR: frame error flag
|
|
\arg USART_FLAG_NERR: noise detected flag
|
|
\arg USART_FLAG_ORERR:overrun error flag
|
|
\arg USART_FLAG_IDLE: idle line detected flag
|
|
\arg USART_FLAG_TC: transmission complete flag
|
|
\arg USART_FLAG_LBD: LIN break detected flag
|
|
\arg USART_FLAG_CTSF: CTS change flag
|
|
\arg USART_FLAG_RT: receiver timeout flag
|
|
\arg USART_FLAG_EB: end of block flag
|
|
\arg USART_FLAG_AM: address match flag
|
|
\arg USART_FLAG_WU: wakeup from deep-sleep mode flag
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_flag_clear(uint32_t usart_periph, usart_flag_enum flag)
|
|
{
|
|
USART_INTC(usart_periph) |= BIT(USART_BIT_POS(flag));
|
|
}
|
|
|
|
/*!
|
|
\brief enable USART interrupt
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] inttype: interrupt type
|
|
\arg USART_INT_IDLE: idle interrupt
|
|
\arg USART_INT_RBNE: read data buffer not empty interrupt and
|
|
overrun error interrupt enable interrupt
|
|
\arg USART_INT_TC: transmission complete interrupt
|
|
\arg USART_INT_TBE: transmit data register empty interrupt
|
|
\arg USART_INT_PERR: parity error interrupt
|
|
\arg USART_INT_AM: address match interrupt
|
|
\arg USART_INT_RT: receiver timeout interrupt
|
|
\arg USART_INT_EB: end of block interrupt
|
|
\arg USART_INT_LBD: LIN break detection interrupt
|
|
\arg USART_INT_ERR: error interrupt enable in multibuffer communication
|
|
\arg USART_INT_CTS: CTS interrupt
|
|
\arg USART_INT_WU: wakeup from deep-sleep mode interrupt
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_interrupt_enable(uint32_t usart_periph, uint32_t inttype)
|
|
{
|
|
USART_REG_VAL(usart_periph, inttype) |= BIT(USART_BIT_POS(inttype));
|
|
}
|
|
|
|
/*!
|
|
\brief disable USART interrupt
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] inttype: interrupt type
|
|
\arg USART_INT_IDLE: idle interrupt
|
|
\arg USART_INT_RBNE: read data buffer not empty interrupt and
|
|
overrun error interrupt
|
|
\arg USART_INT_TC: transmission complete interrupt
|
|
\arg USART_INT_TBE: transmit data register empty interrupt
|
|
\arg USART_INT_PERR: parity error interrupt
|
|
\arg USART_INT_AM: address match interrupt
|
|
\arg USART_INT_RT: receiver timeout interrupt
|
|
\arg USART_INT_EB: end of block interrupt
|
|
\arg USART_INT_LBD: LIN break detection interrupt
|
|
\arg USART_INT_ERR: error interrupt enable in multibuffer communication
|
|
\arg USART_INT_CTS: CTS interrupt
|
|
\arg USART_INT_WU: wakeup from deep-sleep mode interrupt
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_interrupt_disable(uint32_t usart_periph, uint32_t inttype)
|
|
{
|
|
USART_REG_VAL(usart_periph, inttype) &= ~BIT(USART_BIT_POS(inttype));
|
|
}
|
|
|
|
/*!
|
|
\brief enable USART command
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] cmdtype: command type
|
|
\arg USART_CMD_ABDCMD: auto baudrate detection command
|
|
\arg USART_CMD_SBKCMD: send break command
|
|
\arg USART_CMD_MMCMD: mute mode command
|
|
\arg USART_CMD_RXFCMD: receive data flush command
|
|
\arg USART_CMD_TXFCMD: transmit data flush request
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_command_enable(uint32_t usart_periph, uint32_t cmdtype)
|
|
{
|
|
USART_CMD(usart_periph) |= (cmdtype);
|
|
}
|
|
|
|
/*!
|
|
\brief get USART interrupt and flag status
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] int_flag: interrupt and flag type, refer to usart_interrupt_flag_enum
|
|
\arg USART_INT_FLAG_EB: end of block interrupt and flag
|
|
\arg USART_INT_FLAG_RT: receiver timeout interrupt and flag
|
|
\arg USART_INT_FLAG_AM: address match interrupt and flag
|
|
\arg USART_INT_FLAG_PERR: parity error interrupt and flag
|
|
\arg USART_INT_FLAG_TBE: transmitter buffer empty interrupt and flag
|
|
\arg USART_INT_FLAG_TC: transmission complete interrupt and flag
|
|
\arg USART_INT_FLAG_RBNE: read data buffer not empty interrupt and flag
|
|
\arg USART_INT_FLAG_RBNE_ORERR: read data buffer not empty interrupt and overrun error flag
|
|
\arg USART_INT_FLAG_IDLE: IDLE line detected interrupt and flag
|
|
\arg USART_INT_FLAG_LBD: LIN break detected interrupt and flag
|
|
\arg USART_INT_FLAG_WU: wakeup from deep-sleep mode interrupt and flag
|
|
\arg USART_INT_FLAG_CTS: CTS interrupt and flag
|
|
\arg USART_INT_FLAG_ERR_NERR: error interrupt and noise error flag
|
|
\arg USART_INT_FLAG_ERR_ORERR: error interrupt and overrun error
|
|
\arg USART_INT_FLAG_ERR_FERR: error interrupt and frame error flag
|
|
\param[out] none
|
|
\retval FlagStatus: SET or RESET
|
|
*/
|
|
FlagStatus usart_interrupt_flag_get(uint32_t usart_periph, uint32_t int_flag)
|
|
{
|
|
uint32_t intenable = 0U, flagstatus = 0U;
|
|
/* get the interrupt enable bit status */
|
|
intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag)));
|
|
/* get the corresponding flag bit status */
|
|
flagstatus = (USART_REG_VAL2(usart_periph, int_flag) & BIT(USART_BIT_POS2(int_flag)));
|
|
|
|
if(flagstatus && intenable){
|
|
return SET;
|
|
}else{
|
|
return RESET;
|
|
}
|
|
}
|
|
|
|
/*!
|
|
\brief clear USART interrupt flag in STAT register
|
|
\param[in] usart_periph: USARTx(x=0,1)
|
|
\param[in] flag: USART interrupt flag
|
|
\arg USART_INT_FLAG_PERR: parity error flag
|
|
\arg USART_INT_FLAG_FERR: frame error flag
|
|
\arg USART_INT_FLAG_NERR: noise detected flag
|
|
\arg USART_INT_FLAG_ORERR:overrun error flag
|
|
\arg USART_INT_FLAG_IDLE: idle line detected flag
|
|
\arg USART_INT_FLAG_TC: transmission complete flag
|
|
\arg USART_INT_FLAG_LBD: LIN break detected flag
|
|
\arg USART_INT_FLAG_CTS: CTS change flag
|
|
\arg USART_INT_FLAG_RT: receiver timeout flag
|
|
\arg USART_INT_FLAG_EB: end of block flag
|
|
\arg USART_INT_FLAG_AM: address match flag
|
|
\arg USART_INT_FLAG_WU: wakeup from deep-sleep mode flag
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void usart_interrupt_flag_clear(uint32_t usart_periph, uint32_t flag)
|
|
{
|
|
USART_INTC(usart_periph) |= BIT(USART_BIT_POS2(flag));
|
|
}
|